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Giant leap in small technology:
Milestone in the field of nanoelectronics

By David Pescovitz

In the last decade, startling advances in nanoscience promised to open vast new horizons for the future of computing. The ability to understand and control matter at the atomic scale could someday lead to powerful new devices, including handheld sensors for sniffing out the tiniest traces of pathogens and massively dense computer memory chips that outshine today’s state-of-the-art devices by an order of magnitude. Making these wee wonders a reality, though, requires bridging the nanoworld with the microworld of traditional integrated circuit technology.

Photo of Bokor
Professor Jeffrey Bokor stands in front of a poster depicting the layout of the RANT chip's carbon nanotubes grown on top of the silicon circuit.
PEG SKORPINSKI PHOTO

In January, Berkeley and Stanford University researchers announced this giant leap in small technology with their fabrication of the world’s first integrated circuit combining carbon nanotube transistors and silicon transistors on the same chip.

“This is a critical first step in building the most advanced nanoelectronic products, in which we would put carbon nanotubes on top of a powerful silicon integrated circuit so they can interface with an underlying information processing system,” says Jeffrey Bokor, Berkeley professor of electrical engineering and computer sciences and principal investigator of the project.

Carbon nanotubes are carbon molecules that resemble rolls of chicken wire except that they are little more than a nanometer—just a billionth of a meter—in diameter. Depending on how they’re grown, carbon nanotubes can either be semiconducting or metallic, making them well suited for electronic applications like nanowires and nanotransistors pioneered in the last few years by Bokor’s collaborator Hongjie Dai, a professor of chemistry at Stanford University, and independently by researchers with Berkeley’s physics department, the Lawrence Berkeley National Laboratory, and elsewhere. Because of their diminutiveness, carbon nanotube transistors can be packed far more closely together on a chip than their silicon counterparts, providing much more processing power or memory in the same amount of space.

An ongoing challenge is creating just the right chemistry to selectively grow defect-free carbon nanotubes with the desired electrical properties and control their placement. Researchers were unable to predict even the proportion of metallic and semiconducting nanotubes grown in each batch. As a result, each individual carbon nanotube had to be electronically probed by hand one at a time to determine its electrical properties. Quite simply, growing carbon nanotubes required far too much trial and error for practical electronic applications—until now.

The novel hybrid chip fabricated by Bokor, Dai, Berkeley graduate student Yu-Chih Tseng, Stanford graduate student Ali Javey, and their collaborators automates that painstaking process.

“We succeeded in making a tool for nanotechnology researchers, and in the process we demonstrated the broader proof of principle that nanotubes can be successfully integrated in a complex circuit,” Tseng says.

RANT chip
After it is fabricated, the RANT chip is connected to the probing pins of an automatic chip testing machine, known as an autoprobe.
PEG SKORPINSKI PHOTO

The random access nanotube test chip, or RANT chip, was fabricated in a two-part process that began in Berkeley’s Microfabrication Lab. Using traditional integrated circuit patterning techniques, approximately 4,000 transistors were etched into a silicon wafer. After the transistors were patterned, wires had to be added that connect the transistors with each other, and later, the carbon nanotubes.

“Our challenge was to build an interconnect that would work for both silicon and the nanotubes,” Tseng says.

The carbon nanotubes are grown directly onto “islands” containing the specific catalyst necessary for nanotube synthesis. It’s a very hot process though, taking place in a one-inch furnace that climbs to temperatures of 875 degrees Celsius. Standard interconnect materials like aluminum and copper melt at such high temperatures. To prevent the circuitry from burning up, the researchers used molybdenum, a refractory metal that can withstand the heat of the furnace.

Photo of Tseng
Graduate student Yu-Chih Tseng uses the autoprobe to test the RANT chip. Through a multitude of measurements, the autoprobe enables the researchers to quickly characterize whether the nanotubes are semiconducting or metallic.
PEG SKORPINSKI PHOTO

After spending two years tweaking the combination of materials to yield strong connections between the various components, the team produced a one-square-centimeter chip containing thousands of carbon nanotube transistors accessible via a network of silicon transistors. “The circuit is interconnected in such a way that only 22 control signals are needed in testing more than 2,000 nanotubes,” says Tseng. “The key is that this can all be done by a machine and a computer.”

The researchers probe the nanotubes using commercially available semiconductor test systems and automatic wafer-probing systems in their laboratory. Through a multitude of measurements, the nanotubes can quickly be characterized based on their conductivity.

“We can now grow a lot of the tubes, characterize them quickly, try something a little different in the growth process, and then characterize them again,” Bokor says.

The researchers are quick to point out that the test chip is only the first application of their success integrating silicon circuitry with carbon nanotube transistors. For example, carbon nanotubes can be coated with a specific material so that particles of various environmental agents or chemicals—pathogens in the air, for example—stick to the outside of the tubes like barnacles on a ship. As the molecules bind to the carbon nanotubes, the electrical properties of the tubes change.

“They become selective chemical sensors,” Bokor says. “And once you integrate them with electronics as we have, you can imagine a chip that could signal the presence of thousands of different chemicals.”

Beyond handheld hypersensitive chemical sensors, integrating silicon technology with nanotube devices could also lead to extremely dense memory arrays capable of storing tens of thousands times more information in the same space occupied by a standard memory chip. Integrated electronics like those in the RANT chip could read and write data to a compact grid of nanotubes, with each tube storing a single bit of data.

“Specialized applications like sensors and memory . . . seem like a sensible approach to introduce carbon nanotube electronics into a commercial environment,” Bokor says.

With these applications in the back of the researchers’ minds, their next step is to hone their fabrication methods. Already they’re studying other possible interconnect materials that aren’t as finicky as molybdenum when it comes to mass production. They hope future generations of their test chip will lead to the development of nanotube transistors that can be fabricated in bulk and offer improved performance over their silicon counterparts.

Image of MOS circuitry
In a magnified view of carbon nanotube grown on silicon MOS circuitry, the bright area on the upper right-hand side is the catalyst island upon which the nanotube was grown.
IMAGE COURTESY OF ALI JAVEY, STANFORD UNIVERSITY

“One of the key topics going forward will be in the area of technology benchmarking. By this I mean comparing new technology such as carbon nanotubes and silicon with the incumbent silicon technology itself,” says H.S. Philip Wong, senior manager of the Exploratory Devices and Integration Technology Department at the IBM Thomas J. Watson Research Center. “If there is an advantage, then there is a market. More work such as [the RANT project] needs to be done.”

The interdisciplinary research is funded by the Massachusetts Institute of Technology-based MARCO Materials, the Structures and Devices Focus Center, and the Defense Advanced Research Projects Agency (DARPA) Microsystems Technology Office (MTO). The project is part of a larger effort within the UC Berkeley-based Center for Information Technology Research in the Interest of Society (CITRIS) to bring an engineering perspective to nanoscience. Indeed, the RANT research will continue in a new state-of-the-art microfabrication laboratory slated for construction within a new CITRIS building planned for campus.

“The days when large companies could have experimental laboratories for long-range integrated circuit research are gone,” Bokor says. “We’d like the new microlab to be able to handle those kinds of efforts.” The new microlab, which will include an 18,000-foot, two-story clean room, will complement the Molecular Foundry Nanostructures User Laboratory at Lawrence Berkeley National Laboratory. Once completed, the new microlab will be a hub for Berkeley’s groundbreaking efforts in nanoscience and nanoengineering.

“Nanoscience is powerful because it gives us control over the most fundamental physical properties of matter,” Tseng says. “Having that control enables us, as engineers, to develop extremely interesting new devices with unique capabilities.”


David Pescovitz writes Lab Notes, the College of Engineering's online research digest, and contributes to Popular Science, Small Times, and Business 2.0. His writing on science and technology has been featured in Wired, Scientific American, IEEE Spectrum, and the New York Times.


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